www.kersemi.com 1 power mosfet irfr9120, irfu9120, sihfr9120, sihfu9120 features ? dynamic dv/dt rating ? repetitive avalanche rated ? surface mount (irfr9120/sihfr9120) ? straight lead (irfu9120/sihfu9120) ? available in tape and reel ? p-channel ? fast switching ? lead (pb)-free available description third generation power mosfet s from vishay provide the designer with the best combi nation of fast switching, ruggedized device design, low on-resistance and cost-effictiveness. the dpak is designed for su rface mounting using vapor phase, infrared, or wave soldering techniques. the straight lead version (irfu/sihfu series) is for through-hole mounting applications. power dissipation levels up to 1.5 w are possible in typical surcace mount applications. note a. see device orientation. product summary v ds (v) - 100 r ds(on) ( )v gs = - 10 v 0.60 q g (max.) (nc) 18 q gs (nc) 3.0 q gd (nc) 9.0 configuration single s g d p-channel mosfet dpak (to-252) ipak (to-251) a v aila b le rohs* compliant ordering information package dpak (to-252) dpak (to-252) dpak (to-252) ipak (to-251) lead (pb)-free irfr9120pbf irfr9120trpbf a irfr9120trlpbf a IRFU9120PBF sihfr9120-e3 sihfr9120t-e3 a sihfr9120tl-e3 a sihfu9120-e3 snpb irfr9120 irfr9120tr a irfr9120trl a IRFU9120PBF sihfr9120 sihfr9120t a sihfr9120tl a sihfu9120 absolute maximum ratings t c = 25 c, unless otherwise noted parameter symbol limit unit drain-source voltage v ds - 100 v gate-source voltage v gs 20 continuous drain current v gs at - 10 v t c = 25 c i d - 5.6 a t c = 100 c - 3.6 pulsed drain current a i dm - 22 linear derating factor 0.33 w/c linear derating factor (pcb mount) e 0.020 single pulse avalanche energy b e as 210 mj repetitive avalanche current a i ar - 5.6 a repetitive avalanche energy a e ar 4.2 mj maximum power dissipation t c = 25 c p d 42 w maximum power dissipation (pcb mount) e t a = 25 c 2.5 peak diode recovery dv/dt c dv/dt - 5.5 v/ns
www.kersemi.com 2 irfr9120, irfu9120, sihfr9120, sihfu9120 notes a. repetitive rating; pulse width limited by maximum junction temper ature (see fig. 11). b. v dd = - 25 v, starting t j = 25 c, l = 10 mh, r g = 25 , i as = - 5.6 a (see fig. 12). c. i sd - 6.8 a, di/dt 110 a/s, v dd v ds , t j 150 c. d. 1.6 mm from case. e. when mounted on 1" square pcb (fr-4 or g-10 material). note a. when mounted on 1" square pcb (fr-4 or g-10 material). operating junction and st orage temperature range t j , t stg - 55 to + 150 c soldering recommendations (peak temperature) for 10 s 260 d thermal resistance ratings parameter symbol min. typ. max. unit maximum junction-to-ambient r thja - - 110 c/w maximum junction-to-ambient (pcb mount) a r thja --50 maximum junction-to-case (drain) r thjc --3.0 absolute maximum ratings t c = 25 c, unless otherwise noted parameter symbol limit unit specifications t j = 25 c, unless otherwise noted parameter symbol test conditions min. typ. max. unit static drain-source breakdown voltage v ds v gs = 0 v, i d = - 250 a - 100 - - v v ds temperature coefficient v ds /t j reference to 25 c, i d = - 1 ma - - 0.098 - v/c gate-source threshold voltage v gs(th) v ds = v gs , i d = - 250 a - 2.0 - - 4.0 v gate-source leakage i gss v gs = 20 v - - 100 na zero gate voltage drain current i dss v ds = - 100 v, v gs = 0 v - - - 100 a v ds = - 80 v, v gs = 0 v, t j = 125 c - - - 500 drain-source on-state resistance r ds(on) v gs = - 10 v i d = - 3.4 a b - - 0.60 forward transconductance g fs v ds = - 50 v, i d = - 3.4 a 1.5 - - s dynamic input capacitance c iss v gs = 0 v, v ds = - 25 v, f = 1.0 mhz, see fig. 5 - 390 - pf output capacitance c oss - 170 - reverse transfer capacitance c rss -45- total gate charge q g v gs = - 10 v i d = - 6.8 a, v ds = - 80 v, see fig. 6 and 13 b --18 nc gate-source charge q gs --3.0 gate-drain charge q gd --9.0 turn-on delay time t d(on) v dd = - 50 v, i d = - 6.8 a, r g = 18 , r d = 7.1 , see fig. 10 b -9.6- ns rise time t r -29- turn-off delay time t d(off) -21- fall time t f -25- internal drain inductance l d between lead, 6 mm (0.25") from package and center of die contact -4.5- nh internal source inductance l s -7.5- d s g
www.kersemi.com 3 irfr9120, irfu9120, sihfr9120, sihfu9120 notes a. repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. pulse width 300 s; duty cycle 2 %. typical characteristics 25 c, unless otherwise noted fig. 1 - typical output characteristics, t c = 25 c fig. 2 - typical output characteristics, t c = 150 c fig. 3 - typical transfer characteristics fig. 4 - normalized on-resistance vs. temperature drain-source body diode characteristics continuous source-drain diode current i s mosfet symbol showing the integral reverse p - n junction diode --- 5.6 a pulsed diode forward current a i sm --- 22 body diode voltage v sd t j = 25 c, i s = - 5.6 a, v gs = 0 v b --- 6.3v body diode reverse recovery time t rr t j = 25 c, i f = - 6.8 a, di/dt = 100 a/s b - 100 200 ns body diode reverse recovery charge q rr - 0.33 0.66 c forward turn-on time t on intrinsic turn-on time is negligib le (turn-on is dominated by l s and l d ) specifications t j = 25 c, unless otherwise noted parameter symbol test conditions min. typ. max. unit s d g
www.vishay.com document number: 91280 4 s-pending-rev. a, 17-jun-08 irfr9120, irfu9120, sihfr9120, sihfu9120 fig. 5 - typical capacitance vs. drain-to-source voltage fig. 6 - typical gate charge vs. gate-to-source voltage fig. 7 - typical source-drain diode forward voltage fig. 8 - maximum safe operating area
www.kersemi.com 5 irfr9120, irfu9120, sihfr9120, sihfu9120 fig. 9 - maximum drain current vs. case temperature fig. 10a - switching time test circuit fig. 10b - switching time waveforms fig. 11 - maximum effective transient thermal impedance, junction-to-case p u lse w idth 1 s d u ty factor 0.1 % r d v gs r g d.u.t. - 10 v + - v ds v dd v gs 10 % 90 % v ds t d(on) t r t d(off) t f
www.kersemi.com 6 irfr9120, irfu9120, sihfr9120, sihfu9120 fig. 12a - unclamped inductive test circuit fig. 12b - unclamped inductive waveforms fig. 12c - maximum avalanche energy vs. drain current fig. 13a - basic gate charge waveform fig. 13b - gate charge test circuit r g i as 0.01 t p d.u.t l v ds + - v dd - 10 v v ary t p to o b tain re qu ired i as i as v ds v dd v ds t p q gs q gd q g v g charge - 10 v d.u.t. - 3 ma v gs v ds i g i d 0.3 f 0.2 f 50 k 12 v c u rrent reg u lator c u rrent sampling resistors same type as d.u.t. + -
www.kersemi.com 7 irfr9120, irfu9120, sihfr9120, sihfu9120 fig. 14 - for p-channel p. w . period di/dt diode reco v ery d v /dt ripple 5 % body diode for w ard drop re-applied v oltage re v erse reco v ery c u rrent body diode for w ard c u rrent v gs = - 10 v * v dd i sd dri v er gate dri v e d.u.t. i sd w a v eform d.u.t. v ds w a v eform ind u ctor c u rrent d = p. w . period + - - - - + + + * v gs = - 5 v for logic le v el and - 3 v dri v e de v ices peak diode recovery dv/dt test circuit v dd ? d v /dt controlled b y r g ? i sd controlled b y d u ty factor "d" ? d.u.t. - de v ice u nder test d.u.t. circ u it layo u t considerations ? lo w stray ind u ctance ? gro u nd plane ? lo w leakage ind u ctance c u rrent transformer r g compliment n -channel of d.u.t. for dri v er
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